More on Soft Switches of the ADSP-CM408F EZ-KIT Lite Board

by Crossware 27. August 2014 10:07

Continuing with my theme of yesterday where I wrote to the U40 MSP23017 soft switch chip to enable SW4 and SW5, I will show you how to read the register values from this U40 chip.

I've created two subroutines - WriteRegisterValue() and ReadRegisterValue() to make the main function clearer.

You will see below that I am writing to register 0X15 which is the output latch OLATB register whereas yesterday I wrote to register 0X13 GPIOB. But if you read back the value of register 0X13 after you have written to it, you do not see the value that you have written.  Instead you have to read OLATB to see this value.  The MSP23017 data sheet explains that a write to GPIOB is actually a write to OLATB and a read of GPIOB reads the port pins.  So to avoid confusion, I write directly to OLATB instead.

#include "xstdsys.h"

unsigned char regValues[0X16];

void WriteRegisterValue(unsigned char address, unsigned char value)
{
    g_pTWI0->MSTRCTL &= ~(TWI_MSTRCTL_DCNT0 | TWI_MSTRCTL_DCNT1 | TWI_MSTRCTL_DCNT2 | TWI_MSTRCTL_DCNT3 | TWI_MSTRCTL_DCNT4 | TWI_MSTRCTL_DCNT5 | TWI_MSTRCTL_DCNT6 | TWI_MSTRCTL_DCNT7);
    g_pTWI0->MSTRCTL |= 0X02 << 6;    // transmit 2 bytes
    g_pTWI0->MSTRCTL &= ~TWI_MSTRCTL_DIR;    // transmit
    g_pTWI0->TXDATA8 = address;
    g_pTWI0->MSTRCTL |= TWI_MSTRCTL_EN;
    while (g_pTWI0->FIFOSTAT & (TWI_FIFOSTAT_TXSTAT0 | TWI_FIFOSTAT_TXSTAT1));
    while ((g_pTWI0->ISTAT & TWI_ISTAT_TXSERV) == 0);
    g_pTWI0->ISTAT = TWI_ISTAT_TXSERV;
    g_pTWI0->TXDATA8 = value;
    while ((g_pTWI0->ISTAT & TWI_ISTAT_MCOMP) == 0);
    g_pTWI0->ISTAT = TWI_ISTAT_TXSERV | TWI_ISTAT_MCOMP;
}

unsigned char ReadRegisterValue(unsigned char address)
{
    // send register address
    g_pTWI0->MSTRCTL &= ~(TWI_MSTRCTL_DCNT0 | TWI_MSTRCTL_DCNT1 | TWI_MSTRCTL_DCNT2 | TWI_MSTRCTL_DCNT3 | TWI_MSTRCTL_DCNT4 | TWI_MSTRCTL_DCNT5 | TWI_MSTRCTL_DCNT6 | TWI_MSTRCTL_DCNT7);
    g_pTWI0->MSTRCTL |= 0X01 << 6;    // 1 byte
    g_pTWI0->MSTRCTL &= ~TWI_MSTRCTL_DIR;    // transmit
    g_pTWI0->TXDATA8 = address;
    g_pTWI0->MSTRCTL |= TWI_MSTRCTL_EN;
    while (g_pTWI0->FIFOSTAT & (TWI_FIFOSTAT_TXSTAT0 | TWI_FIFOSTAT_TXSTAT1));
    while ((g_pTWI0->ISTAT & TWI_ISTAT_TXSERV) == 0);
    while ((g_pTWI0->ISTAT & TWI_ISTAT_MCOMP) == 0);
    g_pTWI0->ISTAT = TWI_ISTAT_TXSERV | TWI_ISTAT_MCOMP;

    // read value
    g_pTWI0->MSTRCTL &= ~(TWI_MSTRCTL_DCNT0 | TWI_MSTRCTL_DCNT1 | TWI_MSTRCTL_DCNT2 | TWI_MSTRCTL_DCNT3 | TWI_MSTRCTL_DCNT4 | TWI_MSTRCTL_DCNT5 | TWI_MSTRCTL_DCNT6 | TWI_MSTRCTL_DCNT7);
    g_pTWI0->MSTRCTL |= 0X01 << 6;    // 1 byte
    g_pTWI0->MSTRCTL |= TWI_MSTRCTL_DIR;    // receive
    g_pTWI0->MSTRCTL |= TWI_MSTRCTL_EN;
    while ((g_pTWI0->FIFOSTAT & TWI_FIFOSTAT_RXSTAT0) == 0);
    while ((g_pTWI0->ISTAT & TWI_ISTAT_MCOMP) == 0);
    g_pTWI0->ISTAT = TWI_ISTAT_RXSERV | TWI_ISTAT_MCOMP;
    return (unsigned char)g_pTWI0->RXDATA8;
}

main()
{
    g_pTWI0->CLKDIV = 0XFFFF;
    g_pTWI0->MSTRADDR = 0X0020; // U40
    g_pTWI0->CTL = TWI_CTL_EN;

    WriteRegisterValue(0X15, 0X3E);    // write OLATB (output latch B)

    for (unsigned char address = 0; address <= 0X15; address++)
    {
        regValues[address] = ReadRegisterValue(address);
    }


    while (1)                   
    {
    }
}

 

Tags: , , ,

Add comment

  Country flag

biuquote
  • Comment
  • Preview
Loading

About this blog

This is where you will find topical information that we think might be useful to you.

Month List